Global Edge AI Suite for Qualcomm Snapdragon
Build, compile, quantize, and deploy secure, low-latency AI models locally on Qualcomm Snapdragon NPUs and Oryon CPUs with Aura SDK, Aura Models, and Aura Compiler.
Target Platform: Qualcomm Snapdragon X
©QualcommQualcomm Snapdragon Edge AI Suite
The unified platform to compile custom models, run hardware-accelerated local inference, and manage your device fleet on Snapdragon X, automotive, and mobile chips.
Explore Our Edge AI Platform >Aura SDK: Direct Hexagon NPU Access
Isolate inference inside the Hexagon NPU to optimize energy-efficiency and compute density. Leverage Hexagon Vector/Matrix extensions (HVX/HMX) for parallel fused multiply-add operations.
Explore Genie Engine >Zero-Copy Memory Mapping
Directly map model weight tensors into ADSP address spaces, bypassing kernel validation and serialization delays for maximum generation speed.
Read Memory Design >Aura Engine: ONNX Runtime CPU Fallback
Decouple model execution by routing non-supported operators and complex activation layers to the Qualcomm Oryon CPU cores, guaranteeing compatibility with standard ONNX graphs.
Explore CPU Engine >Zero-Cost Rust Bindings
Interfacing with QNN C-APIs securely and without overhead. Enjoy Rust memory safety and zero-cost abstractions for production edge applications.
View API docs >VBS Kernel Security Bypass
Interact directly with Hexagon registers. Disabling Virtualization-Based Security (VBS) allows unsigned user-space libraries to map model memory spaces with low overhead.
Setup VBS Guide >Quantization and Precision Optimizations
Compile models using w4a16 (4-bit integer weights, 16-bit activations) for Hexagon tensor units, and int8/q4 uniform profiles for the Oryon CPU fallback cache hierarchy.
Explore Quantization >Hardware-Level Performance & Safety
Our inference engines are compiled in native Rust to guarantee thread safety and memory isolation when executing models on Snapdragon X silicon.
Read Platform Overview >Supported Hardware & Runtime Dependencies
Developers build faster with Artificial Intelligence Lab
Accelerating local inference. Learn how developers leverage Hexagon NPUs and our optimized Edge AI suite to run on-device models on Snapdragon X laptops.
Explore Our Edge AI Suite >"With Aura SDK, our local AI assistant runs directly on the user's Copilot+ PC without sending sensitive telemetry to the cloud. The zero-copy NPU mapping cut activation latency in half."
View Project GitHub >
"Interfacing with Qualcomm's QNN direct libraries was simplified through Aura's Rust abstractions. We get 30+ TPS on Phi-3 models using the Hexagon NPU, bypassing the cloud overhead."
View Benchmarks >Developer Resources
Explore our deep-dives, research publications, and hardware integration guides. Learn how to leverage Qualcomm Snapdragon X NPU hardware natively with Rust to design next-generation edge applications.
Latest Deep Dives & Articles
Documentation & Quick Links
Aura Compiler Docs
Step-by-step instructions on converting raw ONNX and PyTorch models to Qualcomm QNN-compatible enclaves.
View Compiler Guide >NPU Operator Matrix
Review Hexagon HVX/HMX hardware operator compatibility layers, activation coverage, and fallback vectors.
Browse Operator Matrix >Community Discord
Connect directly with edge AI systems engineers, share benchmarks, ask architecture questions, and collaborate.
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